AMD Radeon Rx 400 series
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|
| Release date | June 2016 |
|---|---|
| Codename | Polaris |
| Rendering support | |
| Direct3D | Direct3D 12.0 feature level 12_1 Shader Model 5.0 |
| OpenCL | OpenCL 2.0 |
| OpenGL | OpenGL 4.5 |
| Vulkan (API) | Vulkan 1.0 SPIR-V |
| History | |
| Predecessor | AMD Radeon Rx 300 Series |
The Radeon Rx 400 is an upcoming brand of graphics cards made by AMD. These cards will be the first to feature the Polaris GPUs, using the new 14 nm[1] FinFET manufacturing process. The Polaris family will initially include two new chips in the Graphics Core Next (GCN) family (Polaris 10 and Polaris 11). Polaris implements version 1.3 of the Graphics Core Next instruction set, and shares commonalities with the previous GCN microarchitectures.
According to AMD, their prime target with the design of Polaris was energy efficiency: Polaris 10 is initially planned to be a mid-range chip, to be featured in the upcoming R9 480, with a TDP of around 110-135W[2] compared to its predecessor R9 380's 190W TDP. Despite this, the Polaris 10 chip is anticipated to run the latest DirectX 12 games "at a resolution of 1440p with a stable 60 frames per second."[2] The low-end Polaris 11 will have a TDP of only 50W.[2]
Polaris 10 may feature 2304 stream processors across 36 Compute Units (CUs), and support up to 8GB of GDDR5(X) memory on a 256-bit memory interface. The GPU is set to replace the mid-range Tonga segment of the Radeon M300 line. Polaris 11, on the other hand, is to succeed the "Curacao" GPU which powers various low-to-mid-range cards. It will likely feature 1024 stream processors over 16 CUs, and is expected to be capable of having 4GB of GDDR5 memory on a 128 bit memory interface.[3]
Contents
Features
| R100 | R200 | R300 | R400 | R500 | R600 | RV670 | R700 | Evergreen | Northern Islands | Southern Islands | Sea Islands |
Volcanic Islands | Arctic Islands/Polaris |
|
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Released | Apr 2000 | Aug 2001 | Oct 2002 | May 2004 | Oct 2005 | May 2006 | Nov 2007 | Jun 2008 | Sep 2009 | Oct 2010 | Jan 2012 | Sep 2013 | Jun 2015 | 2016-Q2/Q3 |
| Instruction set | not publicly known | TeraScale instruction set | GCN instruction set | |||||||||||
| Microarchitecture | TeraScale 1 (VLIW5) | TeraScale 2 (VLIW5) | TeraScale 3 (VLIW4) | GCN 1.0 | GCN 1.1 | GCN 1.2 | Polaris | |||||||
| Microarchitecture type | Fixed pipeline | Unified shader model | ||||||||||||
| Direct3D | 7.0 | 8.1 | 9.0 | 9.0b | 9.0c | 10.0 | 10.1 | 11.0 | 12.0 | 12.1 | ||||
| Shader Model | 1.1 | 1.4 | 2.0+ | 2.b | 3.0 | 4.0 | 4.1 | 5.0 | ||||||
| OpenGL | 1.3 | 2.0 | 3.3 | 4.4 | 4.5 | |||||||||
| Vulkan | N/A | 1.0 | ||||||||||||
| OpenCL | N/A | 1.1 | 1.2 | 2.0 | ||||||||||
| Power saving | ? | PowerPlay | PowerTune | PowerTune & ZeroCore Power | TBA | |||||||||
| Unified Video Decoder | N/A | Avivo/UVD | UVD+ | UVD 2 | UVD 2.2 | UVD 3 | UVD 4 | UVD 4.2 | UVD 5.0 or 6.0 | TBA | ||||
| Video Coding Engine | N/A | VCE 1.0 | VCE 2.0 | VCE 3.0 | TBA | |||||||||
| TrueAudio | N/A | ✔ | TBA | |||||||||||
| FreeSync | N/A | ✔ | TBA | |||||||||||
| Max. displays1 | 1–2 | 2 | 2–6 | TBA | ||||||||||
| Max. resolution | ? | 2–6x 2560×1600 | 2–6x 4096×2160 @ 60 Hz | TBA | ||||||||||
/drm/radeon |
✔ | N/A | ||||||||||||
/drm/amd/amdgpu |
N/A | WIP[4] | experimental | ✔ | TBA | |||||||||
- 1 More displays may be supported with native DisplayPort connections, or splitting the maximum resolution between multiple monitors with active converters.
Chipset table
See below:
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| Model | Launch | Codename | Architecture | Fab (nm) | Transistors (Million) | Die Size (mm2) | Bus interface | Clock rate | Core config1 | Fillrate | Memory | Processing Power (GFLOPS) |
TDP (W) | API support (version) | Release Price (USD) | |||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Core (MHz) | Boost (MHz) | Memory (MT/s) | Pixel (GP/s)2 | Texture (GT/s)3 | Size (MiB) | Bus width (bit) | Bus type | Bandwidth (GB/s) | Single Precision4 | Double Precision | Direct3D | OpenGL | OpenCL | |||||||||||
| Radeon RX 480[5][6] | June 29, 2016 | Polaris 10 | GCN 4 | 14 | TBA | TBA | PCIe 3.0 ×16 | TBA | TBA | TBA | 2304:?:? | TBA | TBA | 4096 8192 |
256 | GDDR5 | 256 | >5000 | TBA | 150 | 12.0 | 4.5 | 2.0 | 199(4GB) $229(8GB) |
1 Unified Shaders : Texture Mapping Units : Render Output Units
2 Pixel fillrate is calculated as the number of ROPs multiplied by the base core clock speed.
3 Texture fillrate is calculated as the number of TMUs multiplied by the base core clock speed.
4 Single precision performance is calculated as based on a FMA operation.
See also
References
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